| CPC H01L 21/76897 (2013.01) [H01L 21/0337 (2013.01); H01L 21/76801 (2013.01); H01L 23/5226 (2013.01); H01L 23/528 (2013.01); H01L 23/53295 (2013.01)] | 20 Claims |

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1. A method of forming a semiconductor structure, comprising:
forming a plurality of conductors in a first dielectric layer on a substrate, wherein the conductors extend in a first direction;
forming a plurality of first conductive vias in a second dielectric layer on the substrate, wherein each of the first conductive vias overlaps one of the conductors;
forming a third dielectric layer on the substrate;
forming a plurality of electrodes in the third dielectric layer, wherein each of the electrodes overlaps one of the first conductive vias;
forming a hard mask on the third dielectric layer;
forming a plurality of mandrel exposures on the hard mask, wherein the mandrel exposures extend in a second direction different from the first direction;
forming a plurality of patterning spacers on sidewalls of the mandrel exposures;
removing the mandrel exposures;
patterning the hard mask based on the patterning spacers; and
forming a plurality of conductive lines in the third dielectric layer based on the patterned hard mask, wherein the conductive lines extend in the second direction and are separated from the electrodes in the second direction, and each of the conductive lines overlaps a corresponding one of the first conductive vias.
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