| CPC H01L 21/76895 (2013.01) [H01L 21/0217 (2013.01); H01L 21/02211 (2013.01); H01L 21/02271 (2013.01); H01L 21/76829 (2013.01); H01L 21/76877 (2013.01); H01L 23/5226 (2013.01); H01L 23/5283 (2013.01); H01L 23/535 (2013.01); H10B 41/27 (2023.02); H10B 43/27 (2023.02)] | 18 Claims |
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1. A method for fabricating a semiconductor device, comprising:
forming a stack of alternating insulating layers and sacrificial layers over a substrate;
forming a staircase in the stack having a plurality of steps, each of the plurality of steps having a tread and a riser and further including a respective pair of the insulating layer and the sacrificial layer over the insulating layer of the respective step;
forming a dielectric layer along the treads and the risers of the plurality of steps, the dielectric layer being doped with one or a combination of carbon, phosphorous, boron, arsenic, and oxygen;
replacing the sacrificial layers with a conductive material to form word line layers that are arranged between the insulating layers; and
forming a plurality of word line contacts that extend from the word line layers of the plurality of steps, and further extend through the dielectric layer,
wherein
the word line contacts do not extend into the word line layers of the plurality of steps,
the word line contacts do not extend through the insulating layers, or
the replacing the sacrificial layers further comprises removing the sacrificial layers and a portion of the dielectric layer that is in contact with the sacrificial layers to form spaces between the insulating layers, and filling the conductive material in the spaces to form the word line layers between the insulating layer, wherein in each of the plurality of steps, the word line layer extends further into the dielectric layer than the insulating layer in a direction parallel to the substrate, and a portion of the word line layer covered by the insulating layer of an overlying step of the plurality of steps has a smaller thickness than a portion of the word line layer at the tread.
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12. A method for fabricating a semiconductor device, comprising:
forming a stack of alternating oxide layers and first nitride layers over a substrate;
etching the stack to form a staircase having a plurality of steps in the stack, each of the plurality of steps having a tread and a riser and further including a respective pair of the oxide layer and the nitride layer over the oxide layer of the respective step;
forming a second nitride layer along the treads and the risers of the plurality of steps, the second nitride layer being doped with one or a combination of carbon, phosphorous, boron, arsenic, and oxygen;
removing the first nitride layers by an etching process to form spaces between the oxide layers, and filling the spaces with a conductive material to form word line layers that are arranged between the oxide layers; and
forming a plurality of word line contacts that extend from the word line layers of the plurality of steps, and further extend through the second nitride layer,
wherein
the word line contacts do not extend into the word line layers of the plurality of steps,
the word line contacts do not extend through the insulating layers, or
the removing the first nitride layers further comprises removing the first nitride layers and a portion of the second nitride layer that is in contact with the first nitride layers to form the spaces between the oxide layers, wherein in each of the plurality of steps, the word line layer extends further into the second nitride layer than the oxide layer in a direction parallel to the substrate, and a portion of the word line layer covered by the insulating layer of an overlying step of the plurality of steps has a smaller thickness than a portion of the word line layer at the tread.
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