US 12,334,167 B2
Method and device for testing memory
Dong Liu, Hefei (CN); Xikun Chu, Hefei (CN); and Tianhao Diwu, Hefei (CN)
Assigned to CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed by CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed on Jul. 5, 2022, as Appl. No. 17/857,235.
Application 17/857,235 is a continuation of application No. PCT/CN2022/081496, filed on Mar. 17, 2022.
Claims priority of application No. 202210021520.5 (CN), filed on Jan. 10, 2022.
Prior Publication US 2023/0223098 A1, Jul. 13, 2023
Int. Cl. G11C 29/08 (2006.01); G11C 8/08 (2006.01); G11C 29/12 (2006.01)
CPC G11C 29/08 (2013.01) [G11C 8/08 (2013.01); G11C 2029/1202 (2013.01); G11C 2029/1204 (2013.01)] 11 Claims
OG exemplary drawing
 
1. A method for testing a memory, comprising:
performing, after activating a word line, at least two consecutive read operations on a memory cell connected to the word line to test the memory cell; and
determining, according to an output signal obtained after the at least two consecutive read operations, whether there is a read abnormality in the memory cell;
wherein performing the at least two consecutive read operations on the memory cell connected to the word line comprises:
performing a first read operation on the memory cell connected to the word line;
performing a second read operation on the memory cell after a predetermined duration after the first read operation; and
acquiring the output signal corresponding to the second read operation;
wherein performing the first read operation comprises:
generating a first column select signal according to a detected first read instruction to perform the first read operation on the memory cell; and
performing the second read operation comprises:
generating a second column select signal according to a detected second read instruction to perform the second read operation on the memory cell.