US 12,334,157 B2
Integrated circuit device
Jang-gn Yun, Hwaseong-si (KR); and Jae-duk Lee, Seongnam-si (KR)
Assigned to Samsung Electronics Co., Ltd., (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Aug. 21, 2023, as Appl. No. 18/453,223.
Application 18/453,223 is a continuation of application No. 17/357,494, filed on Jun. 24, 2021, granted, now 11,776,631.
Application 17/357,494 is a continuation of application No. 17/092,896, filed on Nov. 9, 2020, granted, now 11,074,981, issued on Jul. 27, 2021.
Application 17/092,896 is a continuation of application No. 16/550,591, filed on Aug. 26, 2019, granted, now 10,832,781, issued on Nov. 10, 2020.
Claims priority of application No. 10-2019-0023287 (KR), filed on Feb. 27, 2019.
Prior Publication US 2023/0395155 A1, Dec. 7, 2023
Int. Cl. G11C 16/14 (2006.01); G11C 16/04 (2006.01)
CPC G11C 16/14 (2013.01) [G11C 16/0483 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An integrated circuit device comprising:
channel structures extending in a vertical direction from a substrate;
gate electrodes vertically stacked on the substrate, intersecting the channel structures, and including word lines, erase control lines and string selection lines; and
an erase control driving transistor,
wherein at least two erase control lines among the erase control lines are commonly connected to the erase control driving transistor, and
wherein at least one erase control line among the erase control lines is disposed above or below the word lines and the string selection lines.