| CPC G11C 11/418 (2013.01) | 20 Claims |

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1. A memory device comprising:
a set of memory cells coupled to a word line;
a tracking cell coupled to a tracking word line and a tracking bit line;
a tracking booster circuit coupled to the tracking word line, the tracking booster circuit configured to boost a first edge of a first pulse applied to the tracking word line thereby causing the first edge to become sharper, the tracking cell configured to generate a second pulse at the tracking bit line, in response to the first pulse having the boosted first edge; and
a word line controller configured to apply a third pulse to the word line, based on the second pulse.
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