US 12,334,143 B2
Power level comparator with switching input
Seohee Kim, San Diego, CA (US); Chulmin Jung, San Diego, CA (US); Xiao Chen, San Diego, CA (US); Hanil Lee, San Diego, CA (US); Venugopal Boynapalli, San Diego, CA (US); and Jung Pill Kim, San Diego, CA (US)
Assigned to QUALCOMM INCORPORATED, San Diego, CA (US)
Filed by QUALCOMM Incorporated, San Diego, CA (US)
Filed on Apr. 24, 2023, as Appl. No. 18/306,167.
Prior Publication US 2024/0355381 A1, Oct. 24, 2024
Int. Cl. G11C 11/413 (2006.01); H03K 5/24 (2006.01); H10B 10/00 (2023.01)
CPC G11C 11/413 (2013.01) [H03K 5/24 (2013.01); H10B 10/18 (2023.02)] 24 Claims
OG exemplary drawing
 
1. An integrated circuit, comprising:
a memory including a bitcell array;
a first voltage rail for a first power supply voltage;
a second voltage rail for a second power supply voltage;
a power supply multiplexer configured to select between the first power supply voltage and the second power supply voltage to provide a selected power supply voltage for powering the bitcell array; and
a controller including a comparator stage configured to switch between a first configuration in which a first input terminal of a comparator in the comparator stage is coupled to the first voltage rail and in which a second input terminal of the comparator is coupled to the second voltage rail and a second configuration in which the first input terminal is coupled to the second voltage rail and in which the second input terminal is coupled to the first voltage rail, the controller being configured to control the power supply multiplexer to select between the first power supply voltage and the second power supply voltage responsive to a first output signal and a second output signal of the comparator stage during an operation of the comparator stage in the first configuration and in the second configuration.