US 12,334,142 B2
Sacrificial strings in a memory device to detect read disturb
Kishore Kumar Muchherla, Fremont, CA (US); Violante Moschiano, Avezzano (IT); Akira Goda, Tokyo (JP); Jeffrey S. McNeil, Nampa, ID (US); and Eric N. Lee, San Jose, CA (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Jul. 29, 2022, as Appl. No. 17/877,411.
Claims priority of provisional application 63/260,588, filed on Aug. 26, 2021.
Prior Publication US 2023/0060440 A1, Mar. 2, 2023
Int. Cl. G11C 11/4096 (2006.01); G11C 11/406 (2006.01); G11C 11/4072 (2006.01); G11C 11/408 (2006.01)
CPC G11C 11/4096 (2013.01) [G11C 11/40622 (2013.01); G11C 11/4072 (2013.01); G11C 11/4085 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A memory device comprising:
a memory array comprising a block, the block comprising a plurality of wordlines and a plurality of memory strings each comprising a plurality of memory cells associated with the plurality of wordlines; and
control logic, operatively coupled with the memory array, to perform operations comprising:
determining to initiate a string read operation on a first memory string of the plurality of memory strings, wherein the first memory string is designated as a sacrificial string;
causing a read voltage to be applied to each of the plurality of wordlines of the block concurrently;
sensing a level of current flowing through the first memory string designated as the sacrificial string while the read voltage is applied to each of the plurality of wordlines; and
identifying, based on the level of current flowing through the first memory string designated as the sacrificial string, whether a threshold level of read disturb has occurred on the block.