US 12,334,135 B2
Memory device and memory system for performing target refresh operation, and operation method thereof
Chul Moon Jung, Gyeonggi-do (KR); Byeong Yong Go, Gyeonggi-do (KR); and Woongrae Kim, Gyeonggi-do (KR)
Assigned to SK hynix Inc., Gyeonggi-do (KR)
Filed by SK hynix Inc., Gyeonggi-do (KR)
Filed on May 24, 2023, as Appl. No. 18/322,610.
Claims priority of application No. 10-2022-0178284 (KR), filed on Dec. 19, 2022.
Prior Publication US 2024/0203477 A1, Jun. 20, 2024
Int. Cl. G11C 11/406 (2006.01)
CPC G11C 11/40626 (2013.01) 19 Claims
OG exemplary drawing
 
1. A memory device, comprising:
a rate control circuit configured to:
generate a refresh counting value based on a refresh management command and an internal target refresh command, and
generate a rate control signal by comparing the refresh counting value with a target value corresponding to temperature information; and
a target command issuing circuit configured to:
set a target number according to the rate control signal, and
issue the internal target refresh command whenever a number of inputs of a normal refresh command reaches the target number.