| CPC G09G 3/32 (2013.01) [G09G 3/3266 (2013.01); G09G 2310/0267 (2013.01); G09G 2310/061 (2013.01)] | 12 Claims |
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1. A display device comprising:
a pixel electrically connected to a first gate line and a second gate line and disposed in a first row;
a pixel electrically connected to the second gate line and a reset line and disposed in a second row after the first row;
a pixel electrically connected to a third gate line and a fourth gate line and disposed in a third row after the second row; and
a gate driver supplying a first gate signal, a second gate signal, a third gate signal, and a fourth gate signal to the first gate line, the second gate line, the third gate line, and the fourth gate line and supplying a reset signal to the reset line, wherein
the gate driver supplies the reset signal and the third gate signal of a same timing during an active period, supplies the reset signal having a high level and the third gate signal having a low level during a rest period, and supplies the first gate signal having a high level during a first period of the rest period,
in a process of sensing the pixel disposed in the first row,
the first gate signal and the second gate signal have a high level during the first period of the rest period,
the second gate signal has a high level during a second period after the first period,
the first gate signal and the second gate signal have a high level during a third period after the second period, and
the second gate signal has a high level during a fourth period after the third period.
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