US 12,333,421 B2
Synaptic circuit and neural networking apparatus
Kumiko Nomura, Tokyo (JP); Yoshifumi Nishi, Yokohama Kanagawa (JP); Takao Marukame, Tokyo (JP); and Koichi Mizushima, Kamakura Kanagawa (JP)
Assigned to Kabushiki Kaisha Toshiba, Tokyo (JP)
Filed by KABUSHIKI KAISHA TOSHIBA, Tokyo (JP)
Filed on Aug. 30, 2021, as Appl. No. 17/461,590.
Claims priority of application No. 2021-027592 (JP), filed on Feb. 24, 2021.
Prior Publication US 2022/0269932 A1, Aug. 25, 2022
Int. Cl. G06N 3/065 (2023.01); G06N 3/049 (2023.01); G06N 3/08 (2023.01)
CPC G06N 3/065 (2023.01) [G06N 3/049 (2013.01); G06N 3/08 (2013.01)] 11 Claims
OG exemplary drawing
 
1. A synaptic circuit in which a weight value changed by learning is set, the synaptic circuit receiving a binary input signal indicative of a first value or a second value from a pre-synaptic neuron circuit and outputting an output signal to a post-synaptic neuron circuit, the post-synaptic neuron circuit configured to output a binary firing signal, the synaptic circuit comprising:
a learning circuit configured to update the weight value by spike-timing-dependent synaptic plasticity learning based on the input signal and the firing signal;
a propagation circuit configured to supply, to the post-synaptic neuron circuit, either the output signal represented by an analog value corresponding to the weight value or the output signal obtained by delaying the input signal a time corresponding to the weight value, when the input signal changes from the second value to the first value; and
a control circuit configured to stop output of the output signal from the propagation circuit to the post-synaptic neuron circuit when the weight value is smaller than a predetermined reference value.