US 12,333,272 B2
Power sequence synchronization between multiple devices
Karl John Wallinger, Dallas, TX (US); and Sunil Kashyap Venugopal, Irving, TX (US)
Assigned to TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed by Texas Instruments Incorporated, Dallas, TX (US)
Filed on May 16, 2024, as Appl. No. 18/665,996.
Application 18/665,996 is a continuation of application No. 17/537,997, filed on Nov. 30, 2021, granted, now 12,019,487.
Prior Publication US 2024/0303036 A1, Sep. 12, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H02M 1/00 (2007.01); G06F 1/26 (2006.01); G06F 7/501 (2006.01); G06F 30/343 (2020.01); H03K 19/17724 (2020.01)
CPC G06F 7/501 (2013.01) [G06F 30/343 (2020.01); H03K 19/17724 (2013.01)] 12 Claims
OG exemplary drawing
 
1. A power management circuit, comprising:
a slot parameter memory;
a slot duration counter having a duration counter output and first and second duration counter inputs, wherein the duration counter output is configured to be coupled to a driver; and
a multiplexer having a slot duration input, a select input, and a multiplexer output, wherein the slot duration input is coupled to the slot parameter memory, and the multiplexer output is coupled to the first duration counter input.