| CPC G06F 30/34 (2020.01) [G06F 9/30101 (2013.01)] | 20 Claims |

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1. An Integrated Circuit (IC) device comprising:
a plurality of Processing Elements (PEs), each comprising one or more configurable hardware logic blocks;
a plurality of program data memory elements, each associated with a respective PE;
a plurality of configuration memory elements, wherein each configuration memory element is associated with a respective PE, and adapted to maintain two or more configuration settings of that PE, and wherein the two or more configuration settings correspond to two or more respective, consecutive stages in a pipeline of a computational process; and
a configuration manager circuit,
wherein said configuration manager circuit is configured to:
receive a reconfiguration instruction, dictating a required function of at least part of the IC device;
based on the reconfiguration instruction, identify at least one target PE of the plurality of PEs as a target for reconfiguration;
based on the required function, select a specific configuration setting in the configuration memory element associated with the at least one target PE; and
reconfigure at least one hardware logic block of the at least one target PE during run-time, according to the selected configuration setting, while maintaining content of the respective program data memory element, thereby transferring program data between stages of the pipeline.
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