US 12,333,150 B1
Partitioned non-volatile memory (NVM) having a normal read bus and a verify read bus
Maurits Mario Nicolaas Storms, Best (NL); Jon Scott Choy, Austin, TX (US); Christopher Nelson Hume, Franklin, TN (US); and Timothy Strauss, Granger, IN (US)
Assigned to NXP B.V., Eindhoven (NL)
Filed by NXP B.V., Eindhoven (NL)
Filed on Dec. 13, 2023, as Appl. No. 18/538,451.
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0613 (2013.01) [G06F 3/0659 (2013.01); G06F 3/0679 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A non-volatile memory (NVM) having a daisy chained normal read bus and a daisy chained verify read bus, the NVM comprising:
a plurality of partitions, each partition including a portion of the daisy chained normal read bus and a portion of the daisy chained verify read bus;
a memory controller coupled to receive read data in response to normal read access requests to the NVM via the daisy chained normal read bus and, in response to write access requests to the NVM, receive verify read data via the daisy chained verify read bus; and
a bus sharing circuit coupled between a first partition of the plurality of partitions and a second partition of the plurality of partitions, the bus sharing circuit configured to, in response to a sharing control signal, selectively repurpose portions of the daisy chained verify read bus in at least one of the partitions of the plurality of partitions to communicate read data to the memory controller in response to a normal read access request to the NVM.