| CPC G06F 13/14 (2013.01) [G06F 11/3006 (2013.01); G06F 11/3051 (2013.01); G06F 13/28 (2013.01); G06F 13/36 (2013.01); G06F 13/409 (2013.01); G06F 2213/0026 (2013.01)] | 18 Claims |
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1. An electronic device, comprising:
a first chiplet comprising a first bus interface, a first interconnect management module, and a first interconnect module; and
a second chiplet connected to the first chiplet through the first interconnect module,
wherein, in response to an occurrence of a request transaction associated with the second chiplet, the first interconnect management module stores first information associated with the request transaction in a register,
wherein the first information comprises information associated with a first time of occurrence of the request transaction in the first interconnect management module, and
the first interconnect management module determines occurrence or non-occurrence of a request transaction timeout in the first chiplet, based on whether a transfer of the request transaction is completed before a first threshold time elapses since the first time, and
in response to determining that the request transaction timeout occurs in the first chiplet, the first bus interface is determined as a debugging point candidate.
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