US 12,332,784 B2
Memory controller, storage device including the memory controller, and method of operating the memory controller and the storage device
Do Hun Kim, Icheon (KR); Kwang Sun Lee, Icheon (KR); and Gi Jo Jeong, Icheon (KR)
Assigned to SK hynix Inc., Icheon-si (KR)
Filed by SK hynix Inc., Icheon-si (KR)
Filed on Jan. 4, 2024, as Appl. No. 18/404,695.
Application 18/404,695 is a continuation of application No. 17/742,264, filed on May 11, 2022, granted, now 11,934,309.
Application 17/742,264 is a continuation of application No. 17/196,691, filed on Mar. 9, 2021, granted, now 11,755,476, issued on Sep. 12, 2023.
Application 17/742,264 is a continuation of application No. 16/991,752, filed on Aug. 12, 2020, granted, now 11,449,235, issued on Sep. 20, 2022.
Claims priority of application No. 10-2020-0044768 (KR), filed on Apr. 13, 2020; application No. 10-2020-0077968 (KR), filed on Jun. 25, 2020; and application No. 10-2020-0080589 (KR), filed on Jun. 30, 2020.
Prior Publication US 2024/0176738 A1, May 30, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 12/00 (2006.01); G06F 3/06 (2006.01); G06F 11/10 (2006.01); G06F 12/0802 (2016.01)
CPC G06F 12/0802 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0656 (2013.01); G06F 3/0679 (2013.01); G06F 11/1008 (2013.01); G06F 2212/60 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A method of operating a memory controller that controls a memory device, the method comprising:
generating a codeword by performing encoding on data corresponding to a write transaction received from an external host;
merging the codeword with other codewords to produce a merged codeword associated with a merged transaction; and
providing the merged codeword corresponding to a burst length to the memory device by performing a burst operation,
wherein the burst length corresponds to a number of sequentially decreasing or increasing an address of the codeword.