US 12,332,707 B2
HiLITE: hierarchical and lightweight imitation learning for power management of embedded SoCs
Umit Ogras, Tempe, AZ (US); Radu Marculescu, Austin, TX (US); Ali Akoglu, Tucson, AZ (US); Chaitali Chakrabarti, Tempe, AZ (US); Daniel Bliss, Phoenix, AZ (US); Samet Egemen Arda, Chandler, AZ (US); Anderson Sartor, La Jolla, CA (US); Nirmal Kumbhare, Tucson, AZ (US); Anish Krishnakumar, Madison, WI (US); Joshua Mack, Tucson, AZ (US); Ahmet Goksoy, Madison, WI (US); and Sumit Mandal, Madison, WI (US)
Assigned to ARIZONA BOARD OF REGENTS ON BEHALF OF ARIZONA STATE UNIVERSITY, Scottsdale, AZ (US); ARIZONA BOARD OF REGENTS ON BEHALF OF THE UNIVERSITY OF ARIZONA, Tucson, AZ (US); BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEM, Austin, TX (US); and CARNEGIE MELLON UNIVERSITY, Pittsburgh, PA (US)
Appl. No. 18/249,876
Filed by Arizona Board of Regents on Behalf of Arizona State University, Scottsdale, AZ (US); Arizona Board of Regents on Behalf of the University of Arizona, Tucson, AZ (US); Board of Regents, The University of Texas System, Austin, TX (US); and Carnegie Mellon University, Pittsburgh, PA (US)
PCT Filed Oct. 22, 2021, PCT No. PCT/US2021/056275
§ 371(c)(1), (2) Date Apr. 20, 2023,
PCT Pub. No. WO2022/087428, PCT Pub. Date Apr. 28, 2022.
Claims priority of provisional application 63/104,269, filed on Oct. 22, 2020.
Prior Publication US 2023/0393637 A1, Dec. 7, 2023
Int. Cl. G06F 1/26 (2006.01)
CPC G06F 1/26 (2013.01) 20 Claims
OG exemplary drawing
 
11. A dynamic power management (DPM) framework, comprising:
a heterogeneous system-on-chip (SoC) simulator configured to simulate execution of a plurality of application tasks by a heterogeneous SoC; and
a power manager configured to apply imitation learning (IL)-based power policies to the heterogeneous SoC during execution of the plurality of application tasks, the power manager comprising:
a first level configured to make processing power decisions based on predicting power requirements for implementing the IL-based power policies; and
a second level configured to adjust the first level processing power decisions during run time.