| CPC G02F 1/13685 (2021.01) [G02F 1/136209 (2013.01); G02F 1/136286 (2013.01); H10D 86/423 (2025.01); H10D 86/441 (2025.01); H10D 86/60 (2025.01)] | 11 Claims |
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1. An active matrix substrate having a plurality of pixel regions that are arranged in a matrix pattern including a plurality of rows and a plurality of columns, comprising:
a substrate;
a pixel TFT that is supported by the substrate and provided in correspondence with each of the plurality of pixel regions, the pixel TFT including an oxide semiconductor layer including a channel region and a source contact region and a drain contact region that are located on both sides of the channel region, a gate insulating layer that is provided on the channel region of the oxide semiconductor layer, a gate electrode that is provided on the gate insulating layer and faces the channel region with the gate insulating layer therebetween, and a source electrode that is electrically connected to the source contact region;
a gate line that extends in a row direction and supplies a gate signal to the pixel TFT;
a source line that extends in a column direction and supplies a source signal to the pixel TFT;
a light-blocking layer that is located between the substrate and the oxide semiconductor layer and faces at least the channel region of the oxide semiconductor layer;
a first interlayer insulating layer that is provided so as to cover the oxide semiconductor layer and the gate electrode;
a first organic insulating layer that is located on the first interlayer insulating layer and provided so as to cover the pixel TFT; and
a pixel electrode that includes a portion located on the first organic insulating layer and is electrically connected to the pixel TFT,
wherein, at least in the first interlayer insulating layer, a first pixel contact hole is formed so that at least a part of the drain contact region is exposed,
wherein, in the first organic insulating layer, a second pixel contact hole is formed so as to at least partially overlap at least one of the gate line and the light-blocking layer when seen in a normal direction of the substrate,
wherein the pixel electrode includes a first electrode layer, a second electrode layer, and a third electrode layer each of which is formed from a transparent conductive material,
wherein the first electrode layer, the second electrode layer, and the third electrode layer are arranged in this order from the substrate side and electrically connected to each other,
wherein the first electrode layer includes a first portion that is in contact with the drain contact region of the oxide semiconductor layer in the first pixel contact hole and a second portion that is located in the second pixel contact hole,
wherein the second electrode layer includes a third portion that is in contact with the second portion of the first electrode layer in the second pixel contact hole and a fourth portion that is located on the first organic insulating layer,
wherein the active matrix substrate
further includes a second organic insulating layer that is formed so as to fill the second pixel contact hole and covers the third portion of the second electrode layer,
wherein the third electrode layer includes a fifth portion that is in contact with the fourth portion of the second electrode layer and a sixth portion that is located on the second organic insulating layer, and
wherein a length of the second electrode layer in the row direction is less than or equal to a length of the third electrode layer in the row direction.
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