| CPC G01R 33/481 (2013.01) [G01R 33/385 (2013.01)] | 14 Claims |

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1. A circuit arrangement for correcting an input signal (S2), wherein the input signal (S2) at an input interface of the circuit arrangement comprises a useful signal (S1) with a useful frequency and an interference signal with an interference frequency, wherein the circuit arrangement comprises:
a high-pass filter with a cutoff frequency,
an inverting operational amplifier circuit connected downstream from the high-pass filter and connected in series with the high-pass filter,
an active rectifier circuit connected downstream from the inverting operational amplifier circuit and connected in series therewith, having two parallel-connected conduction paths, wherein each conduction path comprises a rectifying element,
a summing amplifier circuit connected downstream from the rectifier circuit, wherein the summing amplifier circuit has an inverting input and a non-inverting input, and each conduction path is electrically connected to one of the inputs of the summing amplifier circuit.
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