US 12,332,310 B2
Built-in testing in modular system-on-chip device
Xiongzhi Ning, Karlsruhe (DE); Yuyi Tang, Karlsruhe (DE); and Steffen Dolling, Ditzingen (DE)
Assigned to Marvell Asia Pte Ltd, Singapore (SG)
Filed by Marvell Asia Pte Ltd, Singapore (SG)
Filed on Feb. 16, 2023, as Appl. No. 18/170,467.
Claims priority of provisional application 63/417,675, filed on Oct. 19, 2022.
Claims priority of provisional application 63/311,147, filed on Feb. 17, 2022.
Prior Publication US 2023/0258720 A1, Aug. 17, 2023
Int. Cl. G01R 31/319 (2006.01); G01R 31/317 (2006.01); G01R 31/3181 (2006.01); G01R 31/3187 (2006.01)
CPC G01R 31/31903 (2013.01) [G01R 31/31724 (2013.01); G01R 31/31813 (2013.01); G01R 31/3187 (2013.01)] 23 Claims
OG exemplary drawing
 
1. A system-on-chip integrated circuit device, comprising:
a plurality of functional circuit modules located on the system-on-chip integrated device, at least a first circuit module of the plurality of functional circuit modules operating under a Peripheral Component Interconnect Express (PCIe) protocol, the PCIe protocol being an interface protocol for communicating outside the system-on-chip integrated circuit device;
an interconnect fabric coupled to the functional circuit modules in the plurality of functional circuit modules; and
a built-in self-test circuit module coupled to the interconnect fabric, the built-in self-test circuit being configured to, each time the system-on-chip integrated circuit device is started up, (a) test one or more selected functional circuit modules in the plurality of functional circuit modules, including at least the first circuit module under the PCIe protocol for communicating outside the system-on-chip integrated circuit device, by routing test data through the one or more selected functional circuit modules and (b) place the first circuit module, for testing, into a loopback mode that comprises a protocol loopback that simulates link initialization and link training, and a pin loopback that couples a transmit pin of the interface module to a receive pin of the interface module.