| CPC G01N 21/9501 (2013.01) [G06T 7/001 (2013.01); H01L 22/12 (2013.01); G06T 2207/30148 (2013.01)] | 20 Claims |

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1. A semiconductor wafer inspection method, comprising:
providing a wafer comprising a target die and a reference die;
obtaining a candidate image of a first region of the target die;
obtaining a reference image of a second region of the reference die, the second region corresponding to the first region;
performing an imaging process on the candidate image to obtain a high resolution candidate image comprising sub-pixels for each pixel of the candidate image;
performing the imaging process on the reference image to obtain a high resolution reference image comprising sub-pixels for each pixel of the reference image;
shifting the high resolution reference image in units of the sub-pixels;
obtaining a difference image based on a difference between the high resolution candidate image and the high resolution reference image;
transforming the difference image to a spatial frequency domain to obtain a first spatial frequency component;
generating a defect signal based on the first spatial frequency component; and
detecting whether the defect signal exceeds a threshold value.
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