US 12,331,424 B2
Method for depositing an epitaxial layer on a substrate wafer
Thomas Stettner, Waging am See (DE); and Martin Wengbauer, Winhoering (DE)
Assigned to SILTRONIC AG, Munich (DE)
Appl. No. 18/040,991
Filed by SILTRONIC AG, Munich (DE)
PCT Filed Jul. 21, 2021, PCT No. PCT/EP2021/070393
§ 371(c)(1), (2) Date Feb. 8, 2023,
PCT Pub. No. WO2022/037889, PCT Pub. Date Feb. 24, 2022.
Claims priority of application No. 20191322 (EP), filed on Aug. 17, 2020.
Prior Publication US 2023/0265581 A1, Aug. 24, 2023
Int. Cl. C30B 25/16 (2006.01); C30B 25/12 (2006.01); C30B 25/18 (2006.01); C30B 29/06 (2006.01)
CPC C30B 25/16 (2013.01) [C30B 25/12 (2013.01); C30B 25/18 (2013.01); C30B 29/06 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for depositing an epitaxial layer on a substrate wafer comprising:
measuring an edge geometry of the substrate wafer, the substrate wafer having a thicker edge section and a thinner edge section opposite the thicker edge section;
placing the substrate wafer at a position in a pocket of a susceptor of a device for depositing the epitaxial layer, the pocket being surrounded by a boundary and the position being based on the edge geometry, wherein the position in the pocket is such that a first distance from the thicker edge section to the boundary of the pocket is less than a second distance from the thinner edge section to the boundary of the pocket;
beating the substrate wafer in the pocket, and
passing process gas over the substrate wafer while in the pocket such that an epitaxial layer thickness is greater on the thinner edge section than on the thicker edge section.