CPC H10N 50/80 (2023.02) [G11C 11/161 (2013.01); G11C 11/1673 (2013.01); G11C 11/1675 (2013.01); H01F 10/3254 (2013.01); H01F 10/329 (2013.01); H01F 41/34 (2013.01); H10B 61/00 (2023.02); H10N 50/01 (2023.02); H10N 50/85 (2023.02)] | 5 Claims |
1. A method for manufacturing a magnetic memory device, the method comprising:
forming a conductive line and a preliminary magnetic pattern which are sequentially stacked on a substrate and extend in a first direction;
forming a first interlayer insulating layer on the conductive line and the preliminary magnetic pattern;
forming a tunnel barrier layer and a magnetic layer which are sequentially stacked on the first interlayer insulating layer;
forming a mask pattern extending in a second direction intersecting the first direction on the magnetic layer; and
performing an etching process of etching the magnetic layer, the tunnel barrier layer, the first interlayer insulating layer and the preliminary magnetic pattern by using the mask pattern as an etch mask,
wherein the conductive line is an etch stop layer in the etching process.
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