US 12,010,855 B2
Display apparatus and manufacturing method of the same
Jintaek Kim, Yongin-si (KR); Kiwan Ahn, Yongin-si (KR); Jinwoo Lee, Yongin-si (KR); Donghyun Kim, Yongin-si (KR); and Pilsuk Lee, Yongin-si (KR)
Assigned to SAMSUNG DISPLAY CO., LTD., Gyeonggi-do (KR)
Filed by Samsung Display Co., Ltd., Yongin-si (KR)
Filed on Jul. 15, 2021, as Appl. No. 17/376,453.
Application 17/376,453 is a division of application No. 16/220,033, filed on Dec. 14, 2018, granted, now 11,108,006.
Claims priority of application No. 10-2017-0172645 (KR), filed on Dec. 14, 2017.
Prior Publication US 2021/0343959 A1, Nov. 4, 2021
Int. Cl. H10K 59/121 (2023.01); H01L 27/12 (2006.01); H10K 10/46 (2023.01); H10K 59/123 (2023.01); H10K 59/131 (2023.01); H10K 71/00 (2023.01); H10K 50/818 (2023.01); H10K 50/828 (2023.01); H10K 59/122 (2023.01)
CPC H10K 10/478 (2023.02) [H01L 27/1214 (2013.01); H10K 59/1213 (2023.02); H10K 59/1216 (2023.02); H10K 59/123 (2023.02); H10K 59/131 (2023.02); H10K 71/00 (2023.02); H10K 50/818 (2023.02); H10K 50/828 (2023.02); H10K 59/122 (2023.02)] 16 Claims
OG exemplary drawing
 
1. A method of providing a display apparatus, the method comprising:
providing a pixel of the display apparatus on a substrate, the providing of the pixel comprising:
providing a first transistor including a gate electrode;
providing a first electrode of a first capacitor;
providing a second electrode of the first capacitor, from a metal material layer, by etching the metal material layer in a first etching process;
providing a first dielectric pattern of the first capacitor, from a dielectric material layer, by etching the dielectric material layer in a second etching process;
providing a third electrode of a second capacitor;
providing an insulating layer including:
a first insulating layer which is between the second electrode of the first capacitor and the third electrode of the second capacitor, and
a second insulating layer which covers the third electrode; and
after the providing of the third electrode of the second capacitor, providing a plurality of contact holes in the insulating layer at which the first transistor and the first capacitor are respectively connected to electrodes outside thereof,
wherein each of the plurality of contact holes is disposed spaced apart from the first dielectric pattern of the first capacitor.