CPC H03M 7/30 (2013.01) [G06F 13/28 (2013.01); G06F 17/16 (2013.01); G06N 3/063 (2013.01); H03M 7/3082 (2013.01); H03M 7/6029 (2013.01); H03M 7/6064 (2013.01); G06N 3/045 (2023.01)] | 16 Claims |
1. A system comprising:
a first memory;
a second memory; and
a matrix compression accelerator coupled to the first and second memories, wherein the matrix compression accelerator is configured to:
receive 2D uncompressed data from the first memory, wherein the 2D uncompressed data includes a first set of data blocks;
transform the 2D uncompressed data to 1D uncompressed data that includes a second set of data blocks that is a subset of the first set of data blocks of the 2D uncompressed data, wherein the second set of data blocks is not contiguous in the 2D uncompressed data and is contiguous in the 1D uncompressed data;
compressing at least a subset of the 1D uncompressed data to generate a compressed superblock; and
storing the compressed superblock in the second memory.
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