US 12,009,328 B2
Semiconductor package and method of manufacturing the same
Hyunsoo Chung, Hwaseong-si (KR); Taewon Yoo, Seoul (KR); and Myungkee Chung, Sheonan-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Apr. 7, 2022, as Appl. No. 17/715,479.
Application 17/715,479 is a continuation of application No. 16/923,428, filed on Jul. 8, 2020, granted, now 11,362,054.
Claims priority of application No. 10-2020-0018288 (KR), filed on Feb. 14, 2020.
Prior Publication US 2022/0230977 A1, Jul. 21, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 23/00 (2006.01)
CPC H01L 24/13 (2013.01) [H01L 24/03 (2013.01); H01L 24/05 (2013.01); H01L 24/11 (2013.01); H01L 2224/02371 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/05551 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor package, comprising:
a semiconductor chip including a pad;
a first insulation pattern on an upper surface of the semiconductor chip and exposing the pad;
a redistribution layer (RDL) on an upper surface of the first insulation pattern and electrically connected to the pad;
a second insulation pattern on the upper surface of the first insulation pattern, the second insulation pattern including at least one opening that exposes a ball land of the RDL and at least one patterned portion located in the opening;
an under bump metal (UBM) on upper surfaces of the second insulation pattern and the patterned portion and filling the opening, the UBM including a first hole that exposes an edge portion of an upper surface of the ball land and at least one branch that crosses the first hole in a radial direction of the UBM; and
a conductive ball on an upper surface of the UBM, the conductive ball including a first locking portion in the first hole,
wherein the first hole has an area of about 10% to about 50% of an area of the upper surface of the UBM.