US 12,009,271 B2
Protruding SN substrate features for epoxy flow control
Edvin Cetegen, Chandler, AZ (US); Jacob Vehonsky, Gilbert, AZ (US); Nicholas S. Haehn, Scottsdale, AZ (US); Thomas Heaton, Mesa, AZ (US); Steve S. Cho, Chandler, AZ (US); Rahul Jain, Gilbert, AZ (US); Tarek Ibrahim, Mesa, AZ (US); Antariksh Rao Pratap Singh, Gilbert, AZ (US); Nicholas Neal, Scottsdale, AZ (US); Sergio Chan Arguedas, Chandler, AZ (US); and Vipul Mehta, Chandler, AZ (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Jul. 15, 2019, as Appl. No. 16/511,360.
Prior Publication US 2021/0020531 A1, Jan. 21, 2021
Int. Cl. H01L 23/16 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 23/498 (2006.01); H01L 25/065 (2023.01)
CPC H01L 23/16 (2013.01) [H01L 23/3185 (2013.01); H01L 23/49822 (2013.01); H01L 23/49838 (2013.01); H01L 24/16 (2013.01); H01L 25/0655 (2013.01); H01L 2224/16227 (2013.01); H01L 2924/18161 (2013.01)] 26 Claims
OG exemplary drawing
 
1. An electronic package, comprising:
a package substrate;
a plurality of interconnects on the package substrate;
a die coupled to the package substrate by the plurality of interconnects, the die having a footprint;
a flow control feature on the package substrate, wherein the flow control feature is electrically isolated from circuitry of the electronic package, wherein the flow control feature comprises a plurality of substantially parallel lines, and wherein the flow control feature is continuous from a location within the footprint of the die to a location outside of the footprint of the die; and
an underfill surrounding the plurality of interconnects and in contact with the flow control feature.