US 12,009,202 B2
Using a self-assembly layer to facilitate selective formation of an etching stop layer
Shao-Kuan Lee, Kaohsiung (TW); Hsin-Yen Huang, New Taipei (TW); Yung-Hsu Wu, Taipei (TW); Cheng-Chin Lee, Hsinchu (TW); Hai-Ching Chen, Hsinchu (TW); and Shau-Lin Shue, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTORMANUFACTURING CO., LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Jul. 19, 2021, as Appl. No. 17/379,161.
Application 17/379,161 is a division of application No. 16/171,436, filed on Oct. 26, 2018, granted, now 11,069,526.
Claims priority of provisional application 62/690,543, filed on Jun. 27, 2018.
Prior Publication US 2021/0351034 A1, Nov. 11, 2021
Int. Cl. H01L 23/48 (2006.01); H01L 21/02 (2006.01); H01L 21/768 (2006.01); H01L 23/522 (2006.01)
CPC H01L 21/02304 (2013.01) [H01L 21/76802 (2013.01); H01L 21/76877 (2013.01); H01L 23/5222 (2013.01); H01L 23/5226 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method, comprising:
providing a structure that includes a first conductive component and a first interlayer dielectric (ILD) that surrounds the first conductive component;
selectively forming a self-assembly layer directly on an upper surface of the first conductive component;
selectively forming a first dielectric layer over the first ILD;
forming a second ILD over the first conductive component and over the first ILD;
etching an opening in the second ILD, wherein the opening is at least partially aligned with the first conductive component, wherein the first dielectric layer protects portions of the first ILD located therebelow from being etched; and
filling the opening with a conductive material to form a second conductive component in the opening.