US 12,009,051 B2
Method of storing data in memories
Win-San Khwa, Hsinchu (TW); Jui-Jen Wu, Hsinchu (TW); Jen-Chieh Liu, Hsinchu (TW); and Meng-Fan Chang, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed on May 18, 2022, as Appl. No. 17/747,318.
Prior Publication US 2023/0420013 A1, Dec. 28, 2023
Int. Cl. G11C 7/00 (2006.01); G11C 7/06 (2006.01); G11C 7/10 (2006.01)
CPC G11C 7/1096 (2013.01) [G11C 7/06 (2013.01); G11C 7/1069 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
reading a characterization bit of a data stored in bit cells, each bit cell having a first state and a second state, wherein reading the bit cell with the first state consumes less energy than reading the bit cell with the second state or wherein the bit cell with the first state has less retention errors than the bit cell with the second state;
reading a stored bit in a bit cell through a sense amplifier and through either a first read path or a second read path selected based on the characterization bit;
wherein the sense amplifier is configured to generate a sensed bit from the stored bit, the first read path is configured to generate a first output bit from the sensed bit when the first read path is selected, and the second read path is configured to generate a second output bit from the sensed bit when the second read path is selected; and
wherein the first output bit generated from the sensed bit in response to the first read path being selected is configured to be a bitwise complement of the second output bit generated from the sensed bit in response to the second read path being selected.