US 12,009,047 B2
Systems and methods for continuous wordline monitoring
Patrick James Shyvers, Fort Collins, CO (US)
Assigned to Advanced Micro Devices, Inc., Santa Clara, CA (US)
Filed by Advanced Micro Devices, Inc., Santa Clara, CA (US)
Filed on Sep. 30, 2022, as Appl. No. 17/957,498.
Prior Publication US 2024/0112749 A1, Apr. 4, 2024
Int. Cl. G11C 29/52 (2006.01); G06F 11/07 (2006.01); G06F 11/10 (2006.01); G11C 29/10 (2006.01)
CPC G11C 29/52 (2013.01) [G06F 11/0772 (2013.01); G06F 11/0793 (2013.01); G06F 11/1064 (2013.01); G11C 29/10 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A computing device comprising:
a cache memory; and
at least one processor coupled to the cache memory, wherein the at least one processor is configured to:
copy data written to one or more nonredundant wordlines of the cache memory to one or more redundant wordlines of the cache memory;
detect a mismatch between data read from the one or more nonredundant wordlines and data stored in the one or more redundant wordlines; and
perform a remediation action in response to detecting the mismatch.