US 12,008,956 B2
Electronic device and method capable of reducing afterimage of display
Jungbae Bae, Suwon-si (KR)
Assigned to Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Jul. 12, 2023, as Appl. No. 18/351,110.
Application 18/351,110 is a continuation of application No. PCT/KR2022/001719, filed on Feb. 3, 2022.
Claims priority of application No. 10-2021-0018148 (KR), filed on Feb. 9, 2021; and application No. 10-2021-0081675 (KR), filed on Jun. 23, 2021.
Prior Publication US 2023/0351953 A1, Nov. 2, 2023
Int. Cl. G09G 3/3208 (2016.01)
CPC G09G 3/3208 (2013.01) [G09G 2300/0819 (2013.01); G09G 2300/0842 (2013.01); G09G 2300/0861 (2013.01); G09G 2310/08 (2013.01); G09G 2320/0233 (2013.01); G09G 2320/0257 (2013.01); G09G 2354/00 (2013.01)] 15 Claims
OG exemplary drawing
 
1. An electronic device comprising:
a housing;
a display in which a display panel including a plurality of pixels is divided into a first area and a second area;
a display driver integrated circuit (DDI) for driving the display panel; and
at least one processor,
wherein each of the plurality of pixels comprises:
a first thin film transistor (TFT),
a second TFT for switching a connection between a data line of the display panel to which a data voltage is supplied and a source of the first TFT based on a first gate signal,
a third TFT for switching a connection between a gate of the first TFT and a drain of the first TFT based on a second gate signal,
a fourth TFT supplying a first initialization voltage to the gate of the first TFT based on a third gate signal,
a fifth TFT for switching a connection between a positive driving voltage line of the display panel to which a positive driving voltage is supplied and the source of the first TFT based on a light emission signal,
a sixth TFT connecting the drain of the first TFT and an anode of an organic light emitting diode (OLED) based on the light emission signal,
a seventh TFT supplying a second initialization voltage to the anode of the OLED based on a fourth gate signal, and
a storage capacitor disposed between the gate of the first TFT and the positive driving voltage line,
wherein the at least one processor controls:
the display panel to be in a partial display state in which the first area is deactivated and the second area is activated in response to a specified event,
first pixels corresponding to the first area by dividing each frame into a first sub-period and a second sub-period while the display panel is controlled to be in the partial display state,
the first pixels to receive a data voltage corresponding to an inactive state through the second TFT by supplying the first gate signal to the first pixels in the first sub-period, and
the first pixels to receive a bias voltage through the second TFT by supplying the first gate signal to the first pixels in the second sub-period, and
wherein the first pixels maintain the first TFT in a bias state by receiving the bias voltage in the second sub-period.