US 12,008,361 B2
Coherence-based dynamic code rewriting, tracing and code coverage
Irina Calciu, Palo Alto, CA (US); Andreas Nowatzyk, San Jose, CA (US); and Pratap Subrahmanyam, Saratoga, CA (US)
Assigned to VMware LLC, Palo Alto, CA (US)
Filed by VMware, Inc., Palo Alto, CA (US)
Filed on Nov. 19, 2021, as Appl. No. 17/531,582.
Claims priority of provisional application 63/225,099, filed on Jul. 23, 2021.
Prior Publication US 2023/0028825 A1, Jan. 26, 2023
Int. Cl. G06F 9/44 (2018.01); G06F 8/656 (2018.01); G06F 9/30 (2018.01); G06F 9/38 (2018.01); G06F 9/455 (2018.01); G06F 13/16 (2006.01)
CPC G06F 8/656 (2018.02) [G06F 9/30047 (2013.01); G06F 9/3804 (2013.01); G06F 9/45533 (2013.01); G06F 13/1668 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of modifying a portion of code that is stored in code pages while the code is being executed in a processor, the method comprising:
prior to execution of the code by the processor, storing the code pages in a local memory of a device that is connected to the processor via a coherence interconnect; and
during execution of the code by the processor, monitoring by the device the coherence interconnect for requests to access cache lines of the code pages, wherein, in response to a request to read a cache line of the code pages having a particular address, the device retrieves the cache line of the code pages having the particular address from the local memory, stores the cache line retrieved from the local memory in a buffer, modifies the cache line stored in the buffer, and transmits the modified cache line to the processor in place of the cache line retrieved from the local memory.