CPC G06F 13/24 (2013.01) [G06F 1/26 (2013.01)] | 20 Claims |
1. A system comprising:
a first integrated circuit (IC) including a first interrupt controller; and
a second IC, co-packaged with the first IC, and including:
a second plurality of cluster interrupt controllers, wherein a given cluster interrupt controller of the second plurality of cluster interrupt controllers is associated with a second plurality of processors; and
a second interrupt controller, coupled to the second plurality of cluster interrupt controllers, and configured to:
in response to an interrupt from a first interrupt source on the second IC, attempt to deliver the interrupt to the second plurality of cluster interrupt controllers; and
in response to receiving non-acknowledge (NACK) responses from the second plurality of cluster interrupt controllers, communicate the interrupt to the first interrupt controller.
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