US 12,007,899 B2
Delta predictions for page scheduling
Aliasger Tayeb Zaidy, Seattle, WA (US); David Andrew Roberts, Wellesley, MA (US); Patrick Michael Sheridan, Boulder, CO (US); and Lukasz Burzawa, Seattle, WA (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Jul. 18, 2022, as Appl. No. 17/867,371.
Claims priority of provisional application 63/250,460, filed on Sep. 30, 2021.
Prior Publication US 2023/0100328 A1, Mar. 30, 2023
Int. Cl. G06F 12/0882 (2016.01); G06F 12/06 (2006.01)
CPC G06F 12/0882 (2013.01) [G06F 12/0646 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A method comprising:
obtaining memory access sequence data, the memory access sequence data identifying one or more memory addresses previously accessed by a processor;
processing the memory access sequence data to obtain processed address sequence data;
converting the processed address sequence data to a corresponding first set of delta values, the first set of delta values describing differences between addresses of the processed address sequence data;
mapping, using a mapping table, each of the delta values of the first set of delta values to a corresponding class to produce a first set of class identifiers, each delta value in the first set of delta values mapping to either a class specific to that delta value or a catch-all class depending on whether the delta value exceeded a threshold frequency in a training data set;
inputting the class identifiers of the first set of class identifiers into a neural network, the neural network producing a predicted future class identifier sequence identifying a set of one or more class identifiers representing one or more predicted future class identifiers, the predicted future class identifiers representing addresses the neural network predicts will be accessed by the processor in the future, wherein producing the predicted future class identifier sequence identifying the set of one or more class identifiers comprises utilizing a first class identifier of the first set of class identifiers to predict a first predicted class identifier of the predicted future class identifier sequence and utilizing the first predicted class identifier to predict a second predicted class identifier in the predicted future class identifier sequence;
converting each of the predicted class identifiers in the predicted future class identifier sequence to produce a predicted delta value sequence comprising one or more delta values corresponding to the one or more class identifiers of the predicted future class identifier sequence;
converting each of the predicted delta values in the predicted delta value sequence to produce a set of predicted addresses; and
reading memory portions corresponding to selected ones of the addresses in the set of predicted addresses from a first memory system and into a second memory system.