US 12,007,834 B2
Semiconductor device
Choung Ki Song, Icheon-si (KR)
Assigned to SK hynix Inc., Icheon-si (KR)
Filed by SK hynix Inc., Icheon-si (KR)
Filed on Mar. 15, 2022, as Appl. No. 17/695,150.
Claims priority of application No. 10-2021-0158952 (KR), filed on Nov. 17, 2021.
Prior Publication US 2023/0153194 A1, May 18, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 11/10 (2006.01); G06F 11/08 (2006.01); G11C 8/06 (2006.01); H03M 13/00 (2006.01)
CPC G06F 11/08 (2013.01) [G11C 8/06 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
an error check execution signal generation circuit configured to generate an error check execution signal for performing an error check operation when an ECS (Error Check and Scrub) command that is generated based on a refresh command is input; and
an ECS control circuit configured to:
generate an ECS active command and an ECS read command for performing the error check operation based on the ECS command and the error check execution signal, and
successively generate the ECS read commands to perform the error check operation.