US 12,007,824 B2
System, apparatus and method for increasing performance in a processor during a voltage ramp
Altug Koker, El Dorado Hills, CA (US); Abhishek R. Appu, El Dorado Hills, CA (US); Bhushan M. Borole, Rancho Cordova, CA (US); Wenyin Fu, Folsom, CA (US); Kamal Sinha, Rancho Cordova, CA (US); and Joydeep Ray, Folsom, CA (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Nov. 2, 2021, as Appl. No. 17/517,090.
Application 17/517,090 is a continuation of application No. 16/595,543, filed on Oct. 8, 2019, granted, now 11,175,719.
Application 16/595,543 is a continuation of application No. 15/488,662, filed on Apr. 17, 2017, granted, now 10,444,817, issued on Oct. 15, 2019.
Prior Publication US 2022/0197362 A1, Jun. 23, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 1/3234 (2019.01); G06F 1/3237 (2019.01); G06F 1/324 (2019.01); G06F 1/3296 (2019.01); G09G 5/36 (2006.01)
CPC G06F 1/3234 (2013.01) [G06F 1/3237 (2013.01); G06F 1/324 (2013.01); G06F 1/3296 (2013.01); G09G 5/363 (2013.01); G09G 5/366 (2013.01); G09G 2310/066 (2013.01); G09G 2310/08 (2013.01); G09G 2340/02 (2013.01); G09G 2360/06 (2013.01); G09G 2360/08 (2013.01); G09G 2370/022 (2013.01); G09G 2370/16 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A processor comprising:
a graphics processing unit (GPU) comprising a plurality of graphics engines and a plurality of clock generators, each of the plurality of clock generators to provide a clock signal to at least one of the plurality of graphics engines; and
a power controller to control power consumption of the plurality of graphics engines, wherein the power controller, in response to a request for the GPU to exit a low power state in which the GPU is powered down and operate at a first performance state having a first operating voltage and a first operating frequency, is to cause an output voltage of a voltage regulator to increase to the first operating voltage,
wherein the GPU is to exit the low power state and execute a workload at a second performance state when the output voltage reaches a second operating voltage less than the first operating voltage,
wherein the second performance state is an interim performance state having the second operating voltage and a second operating frequency, the second operating frequency less than the first operating frequency, and
wherein the GPU is to execute the workload at a plurality of interim performance states comprising a plurality of interim operating voltages, each having a different operating frequency, before the output voltage reaches the first operating voltage.