US 12,007,462 B2
Non-uniform multi-dimensional data access for radar data processing
Karthik Subburaj, Bangalore (IN); Karthik Ramasubramanian, Bangalore (IN); Shailesh Joshi, Bangalore (IN); Kameswaran Vengattaramane, Bangalore (IN); and Indu Prathapan, Bangalore (IN)
Assigned to Texas Instruments Incorporated, Dallas, TX (US)
Filed by TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed on Jun. 18, 2021, as Appl. No. 17/351,654.
Claims priority of application No. 202041045138 (IN), filed on Oct. 16, 2020.
Prior Publication US 2022/0120884 A1, Apr. 21, 2022
Int. Cl. G01S 13/04 (2006.01); G01S 7/35 (2006.01); G06F 16/22 (2019.01); G06F 16/901 (2019.01); G06F 17/14 (2006.01)
CPC G01S 13/04 (2013.01) [G01S 7/35 (2013.01); G06F 16/2264 (2019.01); G06F 16/9017 (2019.01); G06F 17/142 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A system, comprising:
a memory configured to store a two-dimensional data structure that includes radar data arranged such that radar data of a first transmitter is separated from radar data of a second transmitter by a Doppler offset in the two-dimensional data structure having a first dimension and a second dimension;
a data fetch mechanism that includes:
a first counter configured to increment in a first instance to a set value on the first-dimension to identify locations in the two-dimensional data structure where radar data of the first transmitter are stored, and increment in a second instance to the set value on the second dimension to identify locations in the two-dimensional data structure where radar data of the second transmitter are stored;
a second counter configured to increment between the first and second instances of incrementing by the first counter;
a lookup table (LUT) applied on the first dimension and configured to store indicators of locations in the two-dimensional data structure; and
a first multiplier configured to provide a first address based on a first count value provided by the first counter to the LUT;
a second multiplier configured to provide a second address based on a second count value provided by the second counter to the LUT;
an adder coupled to the first and second multipliers and configured to provide a combined address based on the first and second addresses; and
a two-dimensional wraparound mechanism coupled to the adder and configured to perform a wraparound operation when the combined address is greater than a last valid address in the two-dimensional data structure to generate a new combined address; and
a processor configured to perform a fast Fourier transform (FFT) on a subset of the radar data fetched from the two-dimensional data structure based on the new combined address.