CPC G01R 31/2896 (2013.01) [G01R 31/2834 (2013.01)] | 20 Claims |
1. A method, comprising:
testing a plurality of scan chains in a plurality of shift cycles to obtain a plurality of values;
determining at least one fail chain in the plurality of scan chains and determining at least one fail shift cycle corresponding to at least one fail value in the plurality of values;
generating a mapping table, including the plurality of shift cycles, the plurality of values, and a plurality of pins outputting the plurality of values;
mapping, through the mapping table, the at least one fail chain and the at least one fail shift cycle to the plurality of scan chains to identify an at least one fail flip flop; and
identifying at least one fault site corresponding to the at least one fail flip flop.
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