US 12,329,020 B2
Display substrate, manufacturing method thereof and display apparatus
Yuanzheng Guo, Beijing (CN); Yunhao Wang, Beijing (CN); Yongzhan Han, Beijing (CN); Jie Li, Beijing (CN); and Yanqiang Wang, Beijing (CN)
Assigned to Chengdu BOE Optoelectronics Technology Co., Ltd., Sichuan (CN); and BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
Appl. No. 17/763,187
Filed by Chengdu BOE Optoelectronics Technology Co., Ltd., Sichuan (CN); and BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
PCT Filed May 24, 2021, PCT No. PCT/CN2021/095535
§ 371(c)(1), (2) Date Mar. 23, 2022,
PCT Pub. No. WO2021/238872, PCT Pub. Date Dec. 2, 2021.
Claims priority of application No. 202010456514.3 (CN), filed on May 26, 2020.
Prior Publication US 2022/0359633 A1, Nov. 10, 2022
Int. Cl. H10K 71/00 (2023.01); H10K 50/86 (2023.01); H10K 59/124 (2023.01); H10K 59/80 (2023.01); H10K 59/12 (2023.01); H10K 102/00 (2023.01)
CPC H10K 59/8792 (2023.02) [H10K 50/865 (2023.02); H10K 59/124 (2023.02); H10K 71/00 (2023.02); H10K 59/1201 (2023.02); H10K 59/80518 (2023.02); H10K 2102/351 (2023.02)] 18 Claims
OG exemplary drawing
 
1. A display substrate having a pixel region and a non-pixel region, the display substrate comprising a base substrate and a first electrode layer on the base substrate, wherein
the display substrate further comprises an anti-reflection layer on the first electrode layer, and an orthographic projection of the anti-reflection layer on the base substrate is within the non-pixel region;
the anti-reflection layer comprises a transparent polymer layer and a light-absorbing material; and
a surface of the transparent polymer layer away from the base substrate is provided with a plurality of micro-pores, and the plurality of micro-pores are filled with the light-absorbing material;
wherein the display substrate further comprises: a thin-film transistor on the base substrate and a planarization layer on the thin-film transistor;
the thin-film transistor comprises: an active layer, a gate insulation layer, a gate electrode, an interlayer dielectric layer, a source electrode and a drain electrode on the base substrate in this order; the active layer comprises: a first contact region, a second contact region and a channel region between the first contact region and the second contact region; the source electrode and the drain electrode are provided in a same layer and connected to the first contact region and the second contact region of the active layer through a first via and a second via penetrating through the interlayer dielectric layer and the gate insulation layer, respectively; and
the planarization layer is between the same layer in which the source electrode and the drain electrode are provided and the first electrode layer, and the first electrode layer is connected to the drain electrode through a third via in the planarization layer.