US 12,328,947 B2
Substrate-less silicon controlled rectifier (SCR) integrated circuit structures
Rui Ma, Portland, OR (US); Kalyan Kolluru, Portland, OR (US); Nicholas Thomson, Hillsboro, OR (US); Ayan Kar, Portland, OR (US); Benjamin Orr, Portland, OR (US); Nathan Jack, Forest Grove, OR (US); Biswajeet Guha, Hillsboro, OR (US); Brian Greene, Portland, OR (US); and Chung-Hsun Lin, Portland, OR (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Jun. 24, 2021, as Appl. No. 17/357,754.
Prior Publication US 2022/0415881 A1, Dec. 29, 2022
Int. Cl. H10D 89/60 (2025.01); H10D 18/00 (2025.01); H10D 62/10 (2025.01); H10D 62/13 (2025.01); H10D 62/17 (2025.01); H10D 62/822 (2025.01); H10D 64/27 (2025.01); H10D 84/40 (2025.01)
CPC H10D 89/713 (2025.01) 20 Claims
OG exemplary drawing
 
1. A substrate-less integrated circuit structure, comprising:
a first fin portion and a second fin portion that meet at a junction;
a plurality of gate structures over the first fin portion and the second fin portion; and
a plurality of P-type epitaxial structures and N-type epitaxial structures between corresponding adjacent ones of the plurality of gate structures, wherein pairs of the P-type epitaxial structures alternate with pairs of the N-type epitaxial structures, and a corresponding one or more open locations is between neighboring pairs of the P-type epitaxial structures and pairs of the N-type epitaxial structures, wherein each of the one or more open locations is directly between corresponding ones of the plurality of gate structures.