US 12,328,945 B2
Semiconductor integrated circuit device
Toshio Hino, Yokohama (JP)
Assigned to SOCIONEXT INC., Kanagawa (JP)
Filed by Socionext Inc., Kanagawa (JP)
Filed on Sep. 15, 2022, as Appl. No. 17/945,800.
Application 17/945,800 is a continuation of application No. PCT/JP2020/014206, filed on Mar. 27, 2020.
Prior Publication US 2023/0027616 A1, Jan. 26, 2023
Int. Cl. H10D 89/10 (2025.01); H01L 23/528 (2006.01)
CPC H10D 89/10 (2025.01) [H01L 23/528 (2013.01)] 13 Claims
OG exemplary drawing
 
1. A semiconductor integrated circuit device, comprising
a clock buffer cell that is a standard cell transmitting a clock signal, having an input terminal and an output terminal,
wherein
a first metal interconnect including the output terminal is located in a layer above a second metal interconnect including the input terminal and greater in width than the second metal interconnect.