| CPC H10D 62/118 (2025.01) [H10D 30/031 (2025.01); H10D 30/6713 (2025.01); H10D 30/6735 (2025.01); H10D 30/6757 (2025.01); H10D 84/0128 (2025.01); H10D 84/013 (2025.01); H10D 84/0158 (2025.01); H10D 84/038 (2025.01)] | 20 Claims |

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1. A semiconductor structure, comprising:
first nanostructures surrounded by a first gate structure;
a first source/drain (S/D) structure adjacent to the first gate structure;
a first contact structure formed over a first side of the first S/D structure;
a second contact structure formed over a second side of the first S/D structure, wherein the second contact structure comprises a first portion and a second portion, the first portion and the second portion are made of different materials, the first S/D structure has a first width, the second portion has a second width, and the first width is smaller than the second width; and
a dielectric layer formed above the first gate structure, wherein the dielectric layer is in direct contact with the second contact structure.
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