| CPC H10D 62/111 (2025.01) [H10D 30/0297 (2025.01); H10D 30/668 (2025.01); H10D 62/157 (2025.01); H10D 64/513 (2025.01)] | 12 Claims |

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1. A shielded gate trench (SGT) superjunction (SJ) MOSFET formed in an epitaxial layer of a first conductivity type onto a substrate of said first conductivity type, comprising:
a plurality of gate trenches formed in an active area, surrounded by source regions of said first conductivity type are encompassed in body regions of a second conductivity type near a top surface of said epitaxial layer, each of said gate trenches is filled with a gate electrode and a shielded gate electrode; said shielded gate electrode is insulated from said epitaxial layer by a first insulating film, said gate electrode is insulated from said epitaxial layer by a gate oxide, said shielded gate electrode and said gate electrode are insulated from each other by an Inter-Poly Oxide (IPO) film, said gate oxide surrounds said gate electrode and has less thickness than said first insulating film;
an Oxide Charge Balance (OCB) region formed between two adjacent of said gate trenches below said body regions and above a bottom of said shielded gate electrode;
said body regions, said shielded gate electrode and said source regions are shorted together to a source metal through a plurality of trench contacts;
said epitaxial layer in said OCB region has a first type multiple stepped epitaxial (MSE) layers with different doping concentrations decreasing stepwise in a direction from a bottom of said shielded gate electrode toward said body regions along sidewalls of said gate trenches, wherein each of said first type multiple stepped-epitaxial layers has a uniform doping concentration as grown;
said SGT SJ MOSFET further comprising a SJ region below said OCB region including alternating first doped columns of said first conductivity type and second doped columns of said second conductivity type arranged in parallel and extend from bottoms of said gate trenches toward said substrate wherein each of said second conductivity columns is disposed between two adjacent gate trenches and connected to said body regions; and
a buffer region of said first conductivity type formed between said substrate and said SJ region.
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