| CPC H10D 30/6755 (2025.01) [H01L 21/02178 (2013.01); H01L 21/02183 (2013.01); H01L 21/02186 (2013.01); H01L 21/02266 (2013.01); H01L 21/0228 (2013.01); H10D 30/031 (2025.01); H10D 30/6734 (2025.01); H10D 62/80 (2025.01); H10D 99/00 (2025.01)] | 10 Claims |

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1. A method of manufacturing a semiconductor device, comprising steps of:
forming a first insulator over a substrate;
forming a first oxide film and a first conductive film over the first insulator;
forming a first insulating film and a second insulating film over the first conductive film;
forming an opening reaching the first oxide film in the first conductive film, the first insulating film, and the second insulating film;
forming a third insulating film in the opening;
forming a second conductive film over the third insulating film so that a thickness of the second conductive film at a bottom portion of the opening is larger than a thickness of the second conductive film at a side portion of the opening;
etching the second conductive film at the side portion of the opening so that the second conductive film at the bottom portion of the opening is left;
forming a fourth insulating film over the second conductive film;
forming a third conductive film over the second conductive film; and
performing planarization treatment until the second insulating film is exposed.
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