| CPC H10D 30/6713 (2025.01) [H01L 21/0259 (2013.01); H10D 30/031 (2025.01); H10D 30/6735 (2025.01); H10D 30/6757 (2025.01); H10D 62/118 (2025.01); H10D 64/017 (2025.01); H10D 64/018 (2025.01)] | 20 Claims |
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1. A semiconductor device comprising:
a first active pattern that is disposed in a first region of a substrate, and includes a first lower pattern extending in a first direction, and a plurality of first sheet patterns spaced apart from the first lower pattern in a second direction;
a second active pattern that is disposed in a second region of the substrate, and includes a second lower pattern extending in the first direction, and a plurality of second sheet patterns spaced apart from the second lower pattern in the second direction;
a first gate structure that is disposed on the first lower pattern, and includes a first gate insulating film and a first gate electrode extending in a third direction;
a second gate structure that is disposed on the second lower pattern, and includes a second gate insulating film, and a second gate electrode extending in the third direction;
a first source/drain pattern that is disposed on the first lower pattern and connected to the plurality of first sheet patterns; and
a second source/drain pattern that is disposed on the second lower pattern and connected to the plurality of second sheet patterns,
wherein the first source/drain pattern comprises an epitaxial region that comprises a first semiconductor material and a cavity region that is inside the epitaxial region,
wherein the cavity region is entirely surrounded by the first semiconductor material, and
wherein the second source/drain pattern comprises a second semiconductor material and does not comprise the cavity region.
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