| CPC H10D 30/65 (2025.01) [H01L 21/26533 (2013.01); H01L 21/2822 (2013.01); H10D 30/0281 (2025.01); H10D 62/116 (2025.01); H01L 21/28211 (2013.01)] | 10 Claims |
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1. A semiconductor device, comprising:
a substrate;
a buried oxide layer in the substrate and near a surface of the substrate;
a gate dielectric layer on the substrate and covering the buried oxide layer;
a gate structure disposed on the gate dielectric layer and overlapping the buried oxide layer;
a source region and a drift region in the substrate and respectively at two sides of the gate structure, wherein the drift region partially covers a lower edge of the buried oxide layer and exposes a side edge of the buried oxide layer under the gate structure; and
a drain region in the drift region.
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