US 12,328,888 B2
Method of manufacturing semiconductor device
Yukihiro Tsuji, Osaka (JP)
Assigned to SUMITOMO ELECTRIC INDUSTRIES, LTD., Osaka (JP)
Filed by SUMITOMO ELECTRIC INDUSTRIES, LTD., Osaka (JP)
Filed on Oct. 18, 2022, as Appl. No. 18/047,402.
Claims priority of application No. 2022-008880 (JP), filed on Jan. 24, 2022.
Prior Publication US 2023/0238447 A1, Jul. 27, 2023
Int. Cl. H10D 30/01 (2025.01); H10D 62/13 (2025.01); H10D 64/01 (2025.01)
CPC H10D 30/015 (2025.01) [H10D 62/161 (2025.01); H10D 64/01 (2025.01)] 10 Claims
OG exemplary drawing
 
1. A method of manufacturing a semiconductor device comprising:
forming an electron transit layer above a substrate;
forming an electron supply layer above the electron transit layer;
forming a protective film above the electron transit layer;
forming a zinc oxide film above the protective film;
forming a sacrifice layer above the zinc oxide film;
forming a first opening and a second opening in the sacrifice layer and the zinc oxide film;
forming a third opening connecting to the first opening and a fourth opening connecting to the second opening in the protective film, the electron supply layer, and the electron transit layer;
forming, by acid treatment using a weakly acidic solution, a first gap in a first portion exposed to the first opening of the zinc oxide film, and a second gap in a second portion exposed to the second opening of the zinc oxide film;
forming, after the acid treatment, a source region containing a first conductive impurity on a bottom surface of the third opening and a drain region containing the first conductive impurity on a bottom surface of the fourth opening; and
removing the zinc oxide film after forming the source region and the drain region.