US 12,328,879 B2
Method for manufacturing a two-terminal memory device
Ui-Yeon Won, Ansan-si (KR); Jong-Seok Lee, Suwon-si (KR); and Sang-Hyeok Yang, Suwon-si (KR)
Assigned to HYUNDAI MOTOR COMPANY, Seoul (KR); and KIA CORPORATION, Seoul (KR)
Filed by HYUNDAI MOTOR COMPANY, Seoul (KR); and KIA CORPORATION, Seoul (KR)
Filed on May 22, 2024, as Appl. No. 18/671,441.
Application 18/671,441 is a division of application No. 17/491,012, filed on Sep. 30, 2021, granted, now 12,022,661.
Claims priority of application No. 10-2021-0097829 (KR), filed on Jul. 26, 2021.
Prior Publication US 2024/0315047 A1, Sep. 19, 2024
Int. Cl. H10D 48/32 (2025.01); H10B 53/30 (2023.01); H10D 1/68 (2025.01); H10D 30/69 (2025.01)
CPC H10B 53/30 (2023.02) [H10D 1/692 (2025.01)] 6 Claims
OG exemplary drawing
 
1. A method for manufacturing a two-terminal memory device, the method comprising:
forming an extended drain and a drain layer on a substrate;
forming a ferroelectric layer covering the substrate and the extended drain;
forming a semiconducting layer on the ferroelectric layer; and
forming a source layer connected to the semiconducting layer on the ferroelectric layer.