US 12,328,877 B2
Vertical semiconductor device and method for fabricating the vertical semiconductor device
In-Su Park, Icheon-si (KR); Jong-Gi Kim, Yongin-si (KR); Hai-Won Kim, Icheon-si (KR); and Hoe-Min Jeong, Seoul (KR)
Assigned to SK hynix Inc., Icheon-si (KR)
Filed by SK hynix Inc., Icheon-si (KR)
Filed on Aug. 9, 2023, as Appl. No. 18/446,827.
Application 18/446,827 is a continuation of application No. 17/567,423, filed on Jan. 3, 2022, granted, now 11,751,395.
Application 17/567,423 is a continuation of application No. 16/680,219, filed on Nov. 11, 2019, granted, now 11,244,956, issued on Feb. 8, 2022.
Claims priority of application No. 10-2019-0042570 (KR), filed on Apr. 11, 2019.
Prior Publication US 2023/0403855 A1, Dec. 14, 2023
Int. Cl. H10B 43/27 (2023.01); H01L 21/285 (2006.01); H01L 21/768 (2006.01); H01L 23/532 (2006.01); H01L 23/535 (2006.01); H10B 41/27 (2023.01)
CPC H10B 43/27 (2023.02) [H01L 21/28525 (2013.01); H01L 21/76805 (2013.01); H01L 21/76823 (2013.01); H01L 21/76834 (2013.01); H01L 21/76895 (2013.01); H01L 23/53271 (2013.01); H01L 23/535 (2013.01); H10B 41/27 (2023.02)] 14 Claims
OG exemplary drawing
 
1. A vertical semiconductor device, comprising:
a lower stack including a source channel contact, wherein the source channel contact includes a first conductive layer and a second conductive layer;
an upper stack including a plurality of dielectric layers and a plurality of gate electrodes alternately stacked over the lower stack;
a channel layer penetrating the upper stack and extending in the lower stack, wherein the channel layer contact with the source channel contact; and
a barrier oxide formed on the first and second conductive layers of the source channel contact,
a vertical contact recess formed in the upper stack and extending to expose the barrier oxide; and
a sealing spacer formed on a side wall of the vertical contact recess and extending to cover the barrier oxide,
wherein the source channel contact includes a concave portion and a convex portion, the concave portion and the convex portion are directly contacted with the barrier oxide,
wherein the convex portion of the source channel contact has a peak, and the peak is provided by the second conductive layer, and
wherein the concave portion and the convex portion of the source channel contact are fully covered by the barrier oxide.