| CPC H04L 25/085 (2013.01) [H04B 17/204 (2023.05); H03F 3/45475 (2013.01)] | 20 Claims |

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20. A receiver circuit for a high-speed data communication interface, the receiver circuit comprising:
a differential data signal input including a positive signal input and a negative signal input;
a first termination resistor having a first terminal coupled to the positive signal input and a second terminal at a reference voltage node;
a second termination resistor having a first terminal coupled to the negative signal input and a second terminal coupled to the second terminal of the first termination resistor at the reference voltage node;
a difference amplifier having a first input terminal coupled to a reference voltage, a second input terminal coupled to the reference voltage node, and an output terminal to provide a noise measurement node; and
a reference resistor coupled to the output terminal of the difference amplifier and a second terminal coupled to the second terminal of the first termination resistor and to the second terminal of the second termination resistor;
wherein the receiver circuit is configured to provide at the noise measurement node a representation of common mode noise between the positive signal input and the negative signal input.
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