	US 12,328,133 B2
	High-frequency signal processing circuitry and wireless communication device
Kenichi Shibata, Tokyo (JP)
Assigned to Renesas Electronics Corporation, Tokyo (JP)
Filed by Renesas Electronics Corporation, Tokyo (JP)
Filed on Feb. 7, 2023, as Appl. No. 18/165,449.
Claims priority of application No. 2022-017073 (JP), filed on Feb. 7, 2022.
Prior Publication US 2023/0253996 A1, Aug. 10, 2023
Int. Cl. H04B 1/04 (2006.01)

CPC H04B 1/0483 (2013.01) [H04B 2001/0491 (2013.01)]

20 Claims

1. A high-frequency signal processing circuitry comprising:

a first input terminal, a second input terminal, a third input terminal, and a fourth input terminal;

a first output terminal, a second output terminal, a third output terminal, and a fourth output terminal; and

a first waveform synthesizer, a second waveform synthesizer, a third waveform synthesizer, and a fourth waveform synthesizer,

wherein each waveform synthesizer includes:

a first terminal and a second terminal to which input signals are input; and

a third terminal from which an output signal obtained by synthesizing the plurality of input signals is output,

wherein the first terminal of the first waveform synthesizer is connected to the first input terminal,

wherein the second terminal of the first waveform synthesizer is connected to the fourth input terminal,

wherein the third terminal of the first waveform synthesizer is connected to the first output terminal,

wherein the first terminal of the second waveform synthesizer is connected to the second input terminal,

wherein the second terminal of the second waveform synthesizer is connected to the third input terminal,

wherein the third terminal of the second waveform synthesizer is connected to the second output terminal,

wherein the first terminal of the third waveform synthesizer is connected to the third input terminal,

wherein the second terminal of the third waveform synthesizer is connected to the first input terminal,

wherein the third terminal of the third waveform synthesizer is connected to the third output terminal,

wherein the first terminal of the fourth waveform synthesizer is connected to the fourth input terminal,

wherein the second terminal of the fourth waveform synthesizer is connected to the second input terminal,

wherein the third terminal of the fourth waveform synthesizer is connected to the fourth output terminal,

wherein a first input signal, a second input signal, a third input signal, and a fourth input signal are input to the first input terminal, the second input terminal, the third input terminal, and the fourth input terminal, respectively,

wherein a frequency of each input signal is equal to each other,

wherein a phase of the second input signal, a phase of the third input signal, and a phase of the fourth input signal are a value delayed by 180 degrees or approximately 180 degrees, a value delayed by 90 degrees or approximately 90 degrees, and a value delayed by 270 degrees or approximately 270 degrees, respectively, with respect to a phase of the first input signal,

wherein the output signal output from the third terminal of each waveform synthesizer is a digital signal that takes two states of a first state and a second state,

wherein the state of the output signal transitions from one to the other in conjunction with the input signal input to the first terminal of each waveform synthesizer or the input signal input to the second terminal of each waveform synthesizer, and

wherein the state of the output signal transitions from the other to the one in conjunction with the input signal input to the first terminal of each waveform synthesizer.